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RM0008
15.4.7
TIM6&TIM7 prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
Basic timers (TIM6&TIM7)
15
14
13
12
11
10
9
8
7
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5
4
3
2
1
0
PSC[15:0]
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Bits 15:0 PSC[15:0] : Prescaler value
The counter clock frequency CK_CNT is equal to f CK_PSC / (PSC[15:0] + 1).
PSC contains the value to be loaded into the active prescaler register at each update event.
15.4.8
TIM6&TIM7 auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ARR[15:0]
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Bits 15:0 ARR[15:0] : Prescaler value
ARR is the value to be loaded into the actual auto-reload register.
Refer to Section 15.3.1: Time-base unit on page 376 for more details about ARR update and
behavior.
The counter is blocked while the auto-reload value is null.
Doc ID 13902 Rev 9
385/995
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